Senior HW Engineer – Signal and Power Integrity
Lumai · Oxford HQ · Full-time
Description
The Opportunity Every board Lumai builds has to run multi-gigabit links and feed high-current ASIC and FPGA rails. Getting those right before the board is fabricated is the difference between a working system and a respin cycle. This role owns the modelling, the stackups, the materials and the design rules that make it work, and has a direct say in the decisions that prevent the respin. The Role You will own signal and power integrity across our boards and packages. That means pre-layout channel studies that set routing topologies, stackups, materials and constraints; post-layout analysis of critical channels, including insertion and return loss, crosstalk, and eye and COM analysis with IBIS-AMI models; optimisation of vias, breakouts, connector launches and the transitions into our optical engines; and PDN impedance targets, decoupling strategies and DC drop analysis for high-current rails. What is genuinely hard is that the channels cross boundaries - chip, package, interposer, board and optical engine - and a model is only as good as its weakest corner. You will spend as much time at the bench as in the tool, correlating what you predicted against what the hardware does, and fe…
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Questions about this job
Where is this Senior HW Engineer – Signal and Power Integrity job located?
The listing places this job in Oxford HQ.
Who is hiring?
The employer shown on the listing is Lumai.
What is the salary?
The listing does not state a salary. Ask the employer about pay, overtime and payment dates before accepting.
Is it full-time or part-time?
The listing type is Full-time.
When was this job posted?
It was posted on 10 October 2026. Jobs that stay open too long are closed automatically, so apply soon if you are interested.
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